The present invention relates to fin field effect transistor (finFET) fabrication, and more specifically, to the use of different shallow trench isolation (STI) fill in the fin and non-fin regions of the finFET.
FinFETs are transistors in which the channel regions between the source and drain regions are formed as fins, and gates are formed over the fins. During the fabrication process, gates are formed in both the fin region, where they are retained, and in the non-fin region, where they are ultimately removed. The formation of the dummy gates in the non-fin region facilitates structural control because the gates have much greater height relative to width. Generally, the same oxide is formed between the fins in the fin region and also in the non-fin region. This oxide can affect the structural integrity of the gates.